Alrighty then.
As I said, the timings are latencies. The delay that takes place from a request sent and an answer received. All of the numbers you see, 4-4-4-12 are the latency timings. Each number refers to a different type of latency.
They are arranged like this: CL- tRCD - tRP - tRAS - CMD
To understand the following better, know that memory is internally arranged in a matrix. Much like a spreadsheet, rows and columns. The memory is stored at the intersections of these rows and columns.
CL = CAS Latency - The time it takes from when a command is sent and the time it begins to respond
tRCD = RAS to CAS delay - the time it takes between the activation of a row and a column. Because the data is in rows and columns, the CPU (processor) needs to find which row the data is in with an RAS signal.
tRP - RAS precharge - the time it takes to deactivate the current row of memory and move on to another row
tRAS - active to precharge delay - how long the memory has to wait until the next access to memory can begin
CMD - Command Rate - the time it takes between the memory being activated and the time the first command can be sent to the memory. Usually T1(one clock cycle) or T2(two clock cycles).
All of the numbers you see are the amount of clock cycles.
A little more detail:
CAS - Using the timing 4-4-4-12, this means that it will delay 4 cycles until the data is delivered. If two different sticks of RAM are running at the same clock speed, the one with the lower latency will perform faster.
tRCD - at every intersection of the matrix, there is a value stored, either 1 or 0. The row must be found first, with the RAS signal, then the column is found with the CAS signal. The less time between the activation of the signals means that the memory will be read sooner. The lower this value is, the faster the memory is because it can "read" and "write" data sooner.
tRP - after data has been gathered from the memory, that row needs to be deactivated. It is deactivated with a precharge command. This value is the time taken from the last precharge to the when the next activation can occur.
tRAS - After an "active" command has been sent, another precharge cannot occur until this delay has passed. A lower value means less delay between the closing memory and activating memory.
CMD - this is the time taken by the memory chip from when it is activated, to when any command can be sent to it. Either T1 or T2.
All these values can be altered to make the system faster, like overclocking. However, if you put the values to low, it may cause instability and may cause the computer not to boot. So don't mess around with the values unless you know what you are doing.
Whew, hope that helps.
